About this glossary
This is PCBasic’s practical glossary of production terms you’ll see in PCB fabrication and assembly. Many terms have formal industry definitions (e.g., IPC/ISO), but in day‑to‑day manufacturing they’re often used with a narrower shop‑floor meaning. We’ve written the entries below in plain, actionable language to help you interpret quotes, DFM feedback, travelers, and inspection reports.
How to use
• Designers/Engineers: Use this to align CAD data and notes with factory expectations.
• Buyers/PMs: Decode routing sheets and test reports quickly.
• Quality: Match non‑conformances to commonly accepted definitions.
If you can’t find a term, tell your PCBasic rep—we’ll add it.
Activating
A surface treatment that makes non‑conductive material receptive to electroless copper (also called seeding, catalyzing, sensitizing).
Additive Process
Any PCB build method that forms the circuit pattern by adding metal rather than etching it away.
Analytical Services Lab
Lab work for plating thickness, microsections of hole‑to‑inner‑layer connections, and documentary photos/X‑rays on request.
Annular Ring
Copper land remaining around a drilled/plated hole.
Artwork Master
Accurate (typically 1:1) pattern used to generate production tooling.
Aspect Ratio
Board thickness divided by the smallest drilled hole diameter.
B‑Stage Material (Prepreg)
Fiberglass cloth impregnated with resin cured to an intermediate stage; used to bond layers during lamination.
Back Planes / Panels
Interconnection panels onto which PCBs or modules plug/mount; typically 0.125"–0.300" thick.
Barrel
The plated cylinder formed on the wall of a drilled hole.
Base Copper
Copper foil (sheet or clad) used as inner/outer layer starting material.
Base Laminate / Base Material
Dielectric substrate (rigid or flex) upon which the conductive pattern is formed.
Bed‑of‑Nails (ICT) Technique
Board test using a fixture with spring probes contacting pads/PTHs.
Bleeding
Process solution seeping from voids/crevices in plated holes.
Blind Via Hole (BVH)
Plated via that starts on an outer layer and stops on one or more inner layers (does not pass through the entire stack).
Blister
Localized swelling/separation within laminate or between laminate and copper (a form of delamination).
Blow Hole
Solder joint void caused by trapped volatiles outgassing during heat.
Bond Strength (Peel Strength)
Force/area to separate copper from laminate; often reported as peel strength.
Breakdown Voltage
Voltage at which an insulator fails (dielectric rupture/ionization).
Bridging (Electrical)
Unwanted conductive path between isolated features (e.g., solder bridge between traces).
Buildability Meeting
Pre‑fab review of customer design versus factory capability to flag risks/failure modes.
C‑Stage
Resin fully cured/cross‑linked solid state.
Center‑to‑Center Spacing (Pitch)
Nominal distance between feature centers on any layer.
Chamfer
Beveled/rounded corner to remove a sharp edge (e.g., on edge connectors).
Characteristic Impedance (Z0)
Impedance of a transmission line, set by trace width/thickness, height to planes, and dielectric constant.
Chase
Aluminum frame used for screen printing.
Circuitry Layer
A layer containing conductors, including planes.
Clad / Cladding
Copper foil bonded to laminate core to create base material.
Clearance Hole
Copper opening larger than a drilled hole, concentric with it, to ensure isolation.
Coefficient of Thermal Expansion (CTE)
Fractional size change per degree of temperature change.
Component Hole
Hole used to mount and connect leads, pins, or wires.
Component Side
Board side where most components are placed (often “top”).
Conductive Pattern
Complete set of copper features on a layer—traces, lands, and interconnects.
Conductor / Trace
Copper path/land used to carry current or make connection.
Conductor Base Width / Conductor Width
Trace width measured at laminate surface / observed width at a point on the PCB.
Conductor‑to‑Hole Spacing
Clearance from edge of copper to edge of a hole.
Conductor Thickness
Total thickness of copper including metallic finishes.
Contaminant
Foreign substance that can cause electrical/chemical issues.
Continuity
Unbroken electrical path in a circuit.
Coordinate Tolerancing
Locating holes by x‑y dimensions with linear/angular tolerances (rectangular tolerance zone). See True Position.
Core Group
Daily shift huddle to align output, quality, delivery, and problem resolution.
Cosmetic Defect
Appearance issue that does not affect function.
Coverlay / Cover Coat
Insulating cover on flex/outer layers over copper pattern.
Crazing / Measling
White fiber separations in glass/epoxy visible as crosses or spots.
Current‑Carrying Capacity
Max continuous current a trace can carry without degrading performance.
Datum Reference
Defined point/line/plane for tooling, manufacturing, or inspection reference.
Deburring
Removing burrs/roughness after drilling.
Defect (Major/Minor)
Departure from spec; major affects use, minor does not.
Definition
Edge accuracy of imaged pattern versus master.
Delamination
Separation between laminate layers or between copper and laminate.
Desmear / Etchback
Removing resin smear and debris from hole walls; etchback further recesses dielectric to expose clean inner‑layer copper.
Develop
Dissolving unexposed photoresist to reveal the copper image for etch/plating.
Dewetting
Molten solder pulls back leaving irregular islands and thin films; base metal not exposed.
Dielectric / Dielectric Constant
Insulating medium / its relative permittivity.
Digitizing
Converting 2D features to x‑y digital coordinates.
Dimensional Stability
Change in size due to temperature, humidity, chemicals, age, or stress.
Dimensioned Hole
Hole located by explicit x‑y values (not necessarily on grid).
Double‑Sided Board
Copper patterns on both sides.
Drills (PCB)
Solid‑carbide drills with four‑facet points and two flutes for abrasive composites.
Dry‑Film Resist
Laminated photosensitive film used for imaging, plating, and etching.
Edge Bevel / Edge‑Board Connector
Beveled gold fingers for easier mating / Connector that mates with PCB edge contacts.
Edge Dip Solderability Test
Dip‑solder test on fluxed specimen using controlled immersion/dwell/withdrawal.
Electroless Plating (PTH seed)
Autocatalytic metal deposition without external current; used to make hole walls conductive prior to electroplating.
Electroplating
Depositing metal on a conductive object using DC current in electrolyte.
Entrapment
Air/flux/fumes trapped due to contamination or poor plating.
Epoxy (Resin) Smear
Resin smeared on inner‑layer copper during drilling.
Etch / Etch Factor
Chemical removal of copper / ratio of vertical etch to lateral undercut.
Fiducial
Etched feature or hole used for optical alignment in assembly.
Film Artwork
Positive/negative film of circuit, solder mask, or legend.
First Article
Sample unit built before production to prove capability.
Fixture
Device to interface a PCB to a spring‑probe test pattern.
Flat
Panel‑size sheet of laminate.
Flux
Chemical that removes oxides and promotes solder wetting.
Fused Coating
Tin/lead (or similar) coating melted and resolidified to form metallurgical bond.
Glass Transition Temperature (Tg)
Temperature where resin shifts from glassy/brittle to rubbery; properties change significantly.
Grid
Orthogonal network for locating points.
Ground Plane
Conductor layer used for return, shielding, or heat spreading.
Haloing
Light ring around holes/slots from mechanically induced micro‑cracking.
Hole Breakout
Hole not fully surrounded by its land.
Hole Density
Holes per unit area.
Hole Void
Missing copper in a plated hole exposing base material.
Image
A single PCB pattern; also the imaged area on film/resist/screen.
Ink
Common term for screen‑printed resist or legend.
Inner Layer
Any layer inside a multilayer stack‑up.
Inspection Overlay
Transparency from production master used during inspection.
Insulation Resistance
Resistance of insulating material measured between isolated conductors.
Jumper Wire
Post‑fabrication wire added to create an electrical connection.
Kerf
Extra clearance in rout path for hardware/fit.
Keying Slot
Polarizing slot so a PCB inserts only in the correct orientation.
Laminate / Lamination / Laminating Presses
Bonded layers of material / the bonding process / equipment applying heat and pressure.
Laminate Thickness / Void
Base thickness before processing / absence of laminate where it should be.
Land (Pad) / Landless Hole
Copper area for attachment / plated hole without pad.
Layer‑to‑Layer Spacing
Dielectric thickness between adjacent copper layers.
Lay‑Up
(1) Registering/staging cores and prepregs for lamination. (2) Stepping multiple images on film. (3) Stacking layers for lamination.
Mask (Solder Mask/Resist)
Coating that protects areas from etching, plating, or soldering.
Metlab / Microsectioning
Metallurgical lab and the process of preparing cross‑sections for microscopic analysis.
Microvia
Laser/plasma/photo‑formed via typically < 6 mil (150 μm) diameter connecting adjacent layers.
Mil
0.001 inch.
Minimum Annular Ring
Narrowest copper width between hole edge and land edge (plated or drilled edge depending on layer).
Minimum Electrical Spacing
Smallest allowed clearance between conductors to prevent breakdown/corona at rated conditions.
Misregistration
Pattern/features not aligned to intended positions between layers/steps.
Multilayer PCB
Board with more than two copper layers bonded with dielectrics.
Nail Heading
Flared inner‑layer copper at hole due to drilling.
Negative
Film/tooling where conductive areas are clear and non‑conductive areas are opaque.
Nonfunctional Land
Pad not connected on its layer (often left for structural support).
October Project
Industry effort focused on waste reduction in PCB manufacturing.
Outer Layer
Copper layer on the outside surfaces of the panel.
Outgassing
Gas release from a PCB during soldering.
Overhang
Apparent copper width increase from plating build or etch undercut.
Oxide
Inner‑layer copper roughening treatment to improve bond before lamination.
Panel / Panel Plating
Panel containing one or more images / plating the entire panel and holes.
Part / Pattern / Pattern Plating
Individual item / configuration of copper/non‑copper / selective plating only on imaged copper.
Peel Strength
See Bond Strength.
Permittivity
Ability of a material to store electrical energy in an electric field.
Photomask / Photoresist / Photoplotter
Light‑blocking/Passing film / light‑sensitive coating / high‑accuracy plotter to image film.
Pilot Order
First production order through full process.
Pinhole
Tiny opening through a film or plating/coating layer.
Pitch
See Center‑to‑Center Spacing.
Plated‑Through Hole (PTH)
Hole with copper plated on its wall connecting layers.
Plating / Plating Resist / Plating Void
Metal deposition / mask preventing plating / missing metal in a plated area.
Plotting
Turning x‑y data into visual artwork.
Polyimide Resins
High‑temperature resin systems used in laminates.
Polymerize
Chemically joining monomers/polymers to higher molecular weight.
Positional Limitation Tolerancing (True Position)
Defines an allowable zone within which a feature’s axis/plane may vary.
Pre‑clean
Cleaning before a critical process step.
Prepreg
See B‑Stage Material.
Press‑Fit Contact
Contact pressed into a hole (with or without plating) to make mechanical/electrical connection.
Printed Circuit / Printed Circuit Board (PCB) / Printed Wiring Board (PWB)
Conductive pattern on a base / the board itself / rigid board with printed wiring.
Production Master
1:1 master used to produce single or multiple images.
Reflowing
Melting and resolidifying a deposited coating (e.g., tin) to smooth it.
Registration
How closely features align to intended positions and between layers.
Residue
Undesired substance remaining after a process.
Resin‑Starved Area
Insufficient resin—shows weave texture, low gloss, dry spots.
Resist / Resistivity
Protective coating against etch/plating/solder / material’s resistance to current flow.
Reverse Image
Resist pattern that exposes copper areas for subsequent plating.
Rework
Additional processing to bring product into conformance.
Robber / Thief
Auxiliary plated area to even out current density during electroplating.
Schematic Diagram
Symbolic drawing of an electrical circuit.
Screen / Screen Printing (Silkscreen)
Mesh and process used to transfer inks/resists/legend.
Selective Plate
Plating certain features with a different metal via staged imaging and plating.
Shadowing
During etchback, dielectric adjacent to copper not fully removed.
Single‑Sided Board / Two‑Sided Board
Copper on one side only / on both sides.
Solder Leveling (HASL)
Dipping in molten solder and leveling with hot air.
Solder Mask / Solder Resist / Solder Mask Coating
Protective coating preventing unwanted soldering/bridging.
Solderability Testing
Assessing a metal surface’s ability to be wetted by solder.
Squeegee
Tool that forces ink/resist through a screen.
Starvation, Resin
See Resin‑Starved Area.
Step‑and‑Repeat
Producing multiple images from one by repeated exposures.
Strip
Chemical removal of developed photoresist or certain metals.
Substrate
See Base Material.
Subtractive Process
Manufacturing by removing unwanted copper (opposite of additive).
Test Coupon
Auxiliary pattern used to verify quality parameters without scrapping the actual board.
Tooling Holes
Specified holes used to locate the board during processing/assembly.
Traveler
The step‑by‑step manufacturing record that accompanies an order; includes instructions and traceability.
Underwriters Laboratory (UL) / UL Symbol
Certification body / mark indicating UL recognition.
Via
Plated through connection used only for interlayer connection (no component lead).
Void
Localized absence of material (e.g., in plating, laminate, or solder).
Wave Soldering
Process where assemblies contact a flowing wave of solder.
Zero‑Defects Sampling
Attribute sampling plan with C=0; any observed defect rejects the lot.
Notes from PCBasic
• We follow IPC‑A‑600/IPC‑6012/6013 and related standards for acceptance where applicable; your drawing can supersede with explicit callouts.
• When in doubt about a term on your print or traveler, annotate your Gerbers and BOM and send to your PCBasic engineer—we’ll confirm before build.
